| 3011 Frequently Asked Questions
Why can’t I use the 3011 card in a regular PCI slot?
The 3011 card is designed to be used only in the processor slot of a
passive PCI backplane. These passive PCI backplanes were created by the PCI Industrial Computer Manufacturers Group
(PICMG) back in 1994, as part of a standard that allowed both ISA and PCI expansion cards to exist in systems where all the cards (including the main CPU card) could be installed quickly. Most bus and power connections are made through edge connectors, such that the main CPU card could be replaced in minutes. Contrast that with conventional PC hardware, where replacing the motherboard requires removing all expansion cards, disconnecting numerous cables, and then unbolting the card from the chassis.
The layout specified by PICMG had the ISA connector closest to the card bracket, followed by the PCI connector farther inboard (either 32 or 64 bits wide). Products such as this enjoyed moderate success in the industrial control market, where a very slow transition from ISA to PCI slots occurred, and quick replacement of CPU cards was deemed important to minimize downtime on a production line.
These are commonly referred to as "full
size" PICMG Single Board Computers.
However, the eventual decline in ISA cards left a need for industrial computers that retained the advantages of
the PICMG standard, but omitted the obsolescent cards. A defacto "half
size" SBC standard developed that used the electrical definition of the old standard, but placed the PCI edge connector in the conventional physical location on all the cards.
Numerous companies supply backplanes and/or chassis that support this newer
half size standard. These products are based on a 32 bit PCI bus, 5 volt signaling, and maximum card dimensions of 4.8” height by 7.3” length. Usually 3.3 volt power rails are available on the bus, but not always, as the PCI implementations are based on early PCI local bus specifications. The TAMS 3011 card does require both 5 and 3.3 volts to be provided by the bus, or supplied separately from another source.
What are the technical differences between the processor slot, and expansion slots in the passive PCI backplanes?
The PCI bus found in a product such as a PC is not a linear bus. Individual REQ/GNT pairs from some or all slots are routed to a bus arbiter that controls ownership of the bus. These are used only with expansion cards that are Bus Master capable.
The PICMG standard specifies four individual clock lines to be routed to (up to) four expansion slots.
Some bus-parking (i.e. pull-up resistors) must be provided by an entity in the system.
IDSEL signals must be generated uniquely for each expansion slot for system configuration.
The PCI specifications use the term central resource to describe what provides the bus support functions listed above, along with a few other minor functions. The main processor card (such as the 3011), along with the passive backplane provides these functions. The backplane is called
"passive", since the necessary electronics to implement these functions have been moved from the backplane (i.e. motherboard) onto the card in the processor slot.
As you can tell, the wiring to the first slot (the processor slot) is different than the others, and the 3011 product is designed to work only in that first slot of a passive backplane.
What distributions are supported for the development environment?
RedHat 9, EL WS 3, and EL WS 4 should work without issues. Fedora Core 3 also is believed to be usable, although using it with software releases prior to 2.0 requires that you create a link before installing the development environment to allow proper operation:
What are the specifications on the box?
The optional box sold with the product is totally fanless, and has a 40 watt power supply.
Click here for more detail.
The 3011/3012 board draws less than 4 watts, so 36 watts is available for the two expansion slots. If high-power expansion cards are added by the user, the thermal considerations must be evaluated. The slots are 32 bit, 5 volt signaling. Provisions for mounting a 2.5” form-factor hard disk exist. The box
may secured to a surface with the supplied mounting rails or used on the
desktop.
The backplane has a 40 pin normal density to 44 pin high density IDE converter built into it. This may prove useful if an IDE interface is added.
Is eCos supported on the hardware?
The RedBoot supplied with the system is implemented as an application on top of eCos. That means the sources, drivers, and toolchain needed for building eCos are provided. At this time (Oct 2004), the JFFS2 file system support used with the main FLASH is available only in RedBoot, not in the eCos kernel.
eCos kernel JFFS2 file system support will be added soon. The USB interface is not supported in
either RedBoot or eCos, due to the lack of infrastructure to support host-side USB in eCos.
We do not plan to support USB in RedBoot or eCos. USB is supported
in Linux.
What types of FLASH memory are provided on the board?
The largest memory is 128 Mbytes of NAND-technology flash. Its driver implements partitions that can be used for file storage, such as a kernel or a compressed image of a file system. The bootrom is
500 Kbytes NOR-technology flash, which exists as a memory device in the
PowerPC address space and is used for the initial boot process. It requires no driver for read access, but is much lower density compared to NAND flash.
There is also a 4 Kbytes EEPROM provided on the IIC bus, which is used by the bootrom to store parameters and boot scripts. It is the smallest memory on the board, but easiest to use with full random read and write byte access. Half of that memory is available for use by the user if desired.
How about the SDRAM?
It’s 64 Mbytes of memory, running at 133 MHz, the fastest speed supported by the
405GPr PowerPC chip.
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