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Unlike VXI-MXI-1 cards which were configured with dip switches, VXI-MXI-2 cards have registers mapped into A24 or A32 which can configure the values stored in the unit's EEPROM. The following procedure has to be done once when the multi-cage system is first integrated. The VXI-MXI-2 cards can also be configured with a MXI-2 controller on a PC using National's configuration utility. Here's how to do it on a HP-UX workstation.

Configuring the TAMS card.

In general, for multi-cage VXI systems one wants to set the VME bus timeout value to the highest value possible. For all HP-UX workstations except the C110, C200 and C360, the VME bus timeout value can be set to 512 microseconds. On the C110, C200 and C360 the VME bus timeout value should be set to 256 microseconds.

Configuring the MXI-2 cards.

Use default settings for all jumpers and switches on the MXI-2 cards, except as noted below.

1) In the root, or top chassis, in which the TAMS 80100 is installed, configure the MXI-2 card's W-2 jumper to be non-slot 0. Set the logical address of the MXI-2 card to 1.  Install the MXI-2 card in slot 1, next to the 80100 card.

2) In the slave or "leaf" chassis, the MXI-2 card should be installed in slot 0. The W2 jumper should be set to "slot-0".  Set the logical address of the MXI-2 card to a value such as 128 (must be an even power of 2).

3) MXI-2 cables are directional, so make sure you read the label on the cable and have the end with the label connected to the root or upstream chassis in the chain.

4) Make sure that the VXI-MXI-2 card in the root chassis is connected to another VXI-MXI-2 card. The second card does not need to be powered up, but it appears the VXI-MXI-2 cards require some sort of termination to function properly. Failing to take this step will likely cause a kernel panic on the workstation.

5) Verify the "Restore factory configuration" and "Change factory configuration" switches are both in the "no" position on switch U35.

6) By default, VXI-MXI-2 cards will not route the SYSRESET* signal across the MXI cable. If one powers up or powers down a slave VXI chassis, then one must run `iclear vxi` to reconfigure the MXI system. (One can configure the VXI-MXI-2 cards to route these signals by writing 0xf to the devices "VXIbus Utility Configuration register", offset 0x18 in A16, but the setting is volatile and is cleared by a hard reset)

Configuring EEPROM for MXI-2 in the root chassis.

Note, only byte access can be made to the EEPROM registers, so one has to use the `ipeek` and `ipoke` commands with the `-b` flag for byte access. Also, one needs to keep reading the EEPROM until the desired value is returned after one has written to the EEPROM. It is not possible to read or write the EEPROM unless the appropriate bit is set in the register at offset 0x75b.

0) Find the base address of the MXI-2 card in A24 (A32). Use `ivxisc` to find out where the card (logical address 1) was placed in memory. One has to ipeek and ipoke addresses that are offset from that base address. The value shown here as BASE would typically be something like 0x400000 in A24.

1) Enable access to the EEPROM

`ipoke -b vxi A24 (BASE + 0x75b) 0x81` // enable EEPROM access.

2) If desired, move MXI-2's mapped registers from A24 to A32:

`ipeek -b vxi A24 (BASE + 0x2016)` // Note result.
`ipoke -b vxi A24 (BASE + 0x2016) 0x5f` // Page B-3 in VXI-MXI-2 manual
`ipeek -b vxi A24 (BASE + 0x2016)` // Until 0x5f is returned.
                                                                    // Use 0x4f for A24 space.

Note: if the resource manager is run after this register is changed the following commands will require the address space to be A32 instead of the A24 shown. Step 1 will also have to be repeated using the proper A32 address.

3) Disable the VME bus timer (should be disabled if the card is non-slot-0, but just to be safe)

'ipeek -b vxi A24 (BASE + 0x206f)` // Note result.
'ipoke -b vxi A24 (BASE + 0x206f) 0xc0` // page B-5 in VXI-MXI-2 manual
`ipeek -b vxi A24 (BASE + 0x206f)` // Until 0xc0 is returned

4) Set the MXIbus timer limit. This should be less than the 512 microseconds that the TAMS 80100 is configured to.

`ipeek -b vxi A24 (BASE + 0x2067)` // Note result
`ipoke -b vxi A24 (BASE + 0x2067) 0x06` // 250 microseconds, page B-8
`ipeek -b vxi A24 (BASE + 0x2067)` // until 0x06 is returned.

5) Disable access to the EEPROM:

`ipoke -b vxi A24 (BASE + 0x75b) 0x01` // disable EEPROM access.

Configuring EEPROM for MXI-2 in the other chassis.

Note: the default VME bus timer value of 125 microseconds is "pretty good", so one can usually skip this section unless one has some really slow instruments. The MXI bus timeout in step 4 above should be greater than the VME bus timeout in these chassis.

0) Find the base address of the MXI-2 card(s) in A24 (A32). Use `ivxisc` to find out where the card (logical address 32, 64, 128, etc) was placed in memory.  One has to ipeek and ipoke addresses that are offset from that base address.

1) Enable access to the EEPROM:

`ipoke -b vxi A24 (BASE + 0x75b) 0x81` // enable EEPROM access.

2) If desired, move MXI-2's mapped registers from A24 to A32:

`ipeek -b vxi A24 (BASE + 0x2016)` // Note result.
`ipoke -b vxi A24 (BASE + 0x2016) 0x5f` // Page B-3 in VXI-MXI-2 manual
`ipeek -b vxi A24 (BASE + 0x2016)` // Until 0x5f is returned.
                                  // Use 0x4f for A24 space.

Note: if the resource manager is run after this register is changed the following commands will require the address space to be A32 instead of the A24 shown. Step 1 will also have to be repeated with the proper A32 address.

3) Set the VME bus timer limit. 250 microseconds should be good.

‘ipeek -b vxi A24 (BASE + 0x206f)` // Note result.
‘ipoke -b vxi A24 (BASE + 0x206f) 0xc5` // page B-5 in VXI-MXI-2 manual
‘ipeek -b vxi A24 (BASE + 0x206f)` // Until 0xc5 is returned

4) Disable access to the EEPROM:

`ipoke -b vxi A24 (BASE + 0x75b) 0x01` // disable EEPROM access.