GPIO Status and Control Registers

Table of STATUS and CONTROL REGISTERS for GPIO

Some customers may be porting programs with READIO/WRITEIO statements for the 98622. These statements are NOT supported on the 62622, 61622, or 60622 interfaces in HTBasic. BASIC documentation has always recommended the use of STATUS and CONTROL registers, which are not hardware specific, so as to avoid future hardware incompatibilities. READIO/WRITEIO statements were hardware specific, but many programmers used these commands anyway. Click here to see READIO/WRITEIO register information specifically for the HP98622. (Status/Control equivalents are listed where available.)

ENABLE INTR MASK for GPIO

Bits 7-2
Not Used

Bit 1
Enable Interface Ready Interrupts

Bit 0
Enable EIR Line Interrupts

STATUS/CONTROL REGISTERS for GPIO

These are specifically for BASIC, and are the same as legacy products such as the HP 98622.

Examples for use: STATUS is used to read a status register. CONTROL is used to write to a control register.

STATUS Example:
Status register 0 returns a number to identify the interface type:
10 INTEGER I 20 STATUS 12,0;I 30 IF I=3 THEN PRINT "GPIO IDENTIFIED"
CONTROL Example:
Writing a nonzero number to Control Register 0 resets the interface.
100 CONTROL 12,0;1

REGISTERS Table

Register	Status Register (you read these)	Meaning	Control Register (you write to these)	Meaning
0	Card Identification	Always 3	Interface Reset	Any nonzero sent here resets the interface.
1	Interrupt and DMA Status	See Table Below	Set PCTL Line	Any nonzero sent here sets the line. However, you must disable auto handshaking first. See Register 6.
2	Interface Activity	See Table below	Peripheral Control	See Table Below
3	Data in: 16 Bits	DI15-DI0	Data out: 16 Bits	DO15-DO0
4	Interface Ready (for next handshake)	1=Ready 0=Busy	(undefined)	(undefined)
5	Peripheral Status	See table below	(undefined)	(undefined)
6	Handshake Mode	Bit 0: auto handshake enabled Bit 1: enhanced mode enabled	Auto handshaking	Setting bit 0: enables auto handshaking. Clearing bit 0 disables auto handshaking. This must be done before taking control of PCTL, for instance.

Status Register 1: Interrupt and DMA Status

7 6 5 4 3 2 1 0

Interrupts are enabled An interrupt is currently requested Interrupt level switches Interrupt level switches Burst mode DMA Word mode DMA DMA channel 1 enabled DMA channel 2 enabled

Status Register 2: Interface Activity

7 6 5 4 3 2 1 0

0 0 0 0 0 Handshake in process Interrupts are enabled Transfer in progress

Status Register 5 Peripheral Status

7 6 5 4 3 2 1 0

0 0 0 0 PSTS Ok EIR Line Low STI1 line low STI0 line low

Status Register 255: Burst I/O and Lock State

Value = 0 Interface unlocked, Burst disabled

Value = 1 Interface Locked

Value = 3 Burst I/O Enabled

Control Register 2: Peripheral Control

7 6 5 4 3 2 1 0

Not Used PSTS error
1=report
0=ignore Set CTL1
1=LO
0=HI Set CTL0
1=LO
0=HI

Control Register 255: Burst and Locking

Send value 0 Disable Burst I/O, Disable interface locking

Send Value=1 Enable Interface Locking

Send Value=3 Enable Burst I/O


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