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This is a useful comparison only for customers who used these registers.
(From HP BASIC Interface Reference)
| Register |
READIO REGISTER |
MEANING |
Status / Control Equivalent |
WRITEIO REGISTER |
MEANING |
Status / Control Equivalent |
| 0 |
Interface Ready |
1=Ready; 0=Not Ready |
Status Register 4 |
Set PCTL |
Nonzero value: Set |
Control Register 1 |
| 1 |
Card Identification |
Always 3 |
Status Register 0 |
Reset Interface |
Nonzero value: Reset |
Control Register 0 |
| 2 |
(Undefined) |
(Undefined) |
NA |
Interrupt Mask |
See Table Below |
Use ENABLE INTR Register |
| 3 |
Interrupt Status |
See Table below |
Status Register 1 |
Interrupt and DMA Enable |
See Table Below |
Control Register 255 |
| 4 |
MSB of DATA IN |
DI15-DI8 |
Status Register 3 (MSB) |
MSB of DATA OUT |
DO15-DO8 |
Control Register 3 (MSB) |
| 5 |
LSB of DATA IN |
DI7-DI0 |
Status Register 3 (LSB) |
LSB of DATA OUT |
DO7-DO0 |
Control Register 3 (LSB) |
| 6 |
(Undefined) |
(Undefined) |
NA |
(Undefined) |
(Undefined) |
NA |
| 7 |
Peripheral Status |
See Table Below |
Status Register 5 |
Set control output lines |
| Bits 7-2 |
Not Used |
| Bit 1 |
CTL1
1=LO
0=HI |
| Bit 0 |
CTL0
1=LO
0=HI |
|
Control Register 2 |
READIO REGISTER 3: Interrupt Status
| 7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
| Interrupts are enabled |
An interrupt is currently requested |
Interrupt level switches
(hardware priority) |
Interrupt level switches
(hardware priority) |
Burst mode DMA |
Word mode DMA |
DMA Channel 1 Enabled |
DMA Channel 2 Enabled |
| Value: 128 |
64 |
32 |
16 |
8 |
4 |
2 |
1 |
READIO REGISTER 7: Peripheral Status
| 7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
| 0 |
0 |
0 |
0 |
PSTS OK |
EIR line low |
STI1 line low |
STI0 line low |
WRITEIO REGISTER 2 Interrupt Mask
| 7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
| Not Used |
Interface Ready Interrupts |
EIR line Interrupts |
WRITEIO REGISTER 3 Enable Interrupts and DMA
| 7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
| Enable Interrupts |
Not Used |
Enable Burst Mode DMA |
Enable word mode DMA |
Enable DMA Channel 1 |
Enable DMA Channel 0 |
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